1. Field of the Invention
The invention relates to a circuit arrangement for level adaptation between an I.sup.2 L circuit and a preceding combinatory logic circuit, comprising a direct current source which is connected to the input of a switch which can be controlled in dependence of the level on the output of the combinatory logic circuit, at least one of the two outputs of the switch being connected to the input of a current mirror whose output is connected to the input of the I.sup.2 L circuit.
2. Description of the Prior Art
I.sup.2 L circuits (I.sup.2 L=integrated injection logic) which are described in Valvo-Berichten, Volume XVIII, pages 215-226, as well as in Philips techn. Rdsch. 33, 1973/74, pages 82 to 91, require comparatively low voltage levels (0 V and 0.7 V) for getting into the one or the other logic state ("0" and "1", respectively). However, circuits manufactured using another technological process, for example TTL circuits, produce essentially higher levels on their output, for example 0 V/5 V. Therefore, when the output signals of such a circuit are to be processed by an I.sup.2 L circuit level adaptation is required.
In said Valvo-Berichten FIG. 14b) a resistor is connected for this purpose between the input of the I.sup.2 L circuit and the output of the preceding circuit. It is a drawback of this solution that this resistor must be comparatively large, that is to say larger as the supply voltage of the preceding circuit is higher. because the input currents of an I.sup.2 L circuit are comparatively small (for example, 20 .mu.A). Such a high-ohmic matching resistor would require a very large surface area in an integrated circuit, so that this solution is hardly suitable for the integrated circuit technique. Moreover, the input levels of the I.sup.2 L circuit are co-determined by the supply voltage of the preceding circuit, which is also a drawback.
A level adaptation circuit for I.sup.2 L circuits is known from No. DE-A-3137010. The circuit disclosed therein enables conversion from one level to another level. In order to enable adaptation of a number of levels to I.sup.2 L levels, a corresponding number of circuits would be required. This represents a complex and voluminous solution.
It is the object of the present invention to provide a circuit which can be very easily constructed as an integrated circuit and which enables adaptation of several higher output levels of a preceding circuit to the lower input levels of an I.sup.2 L circuit.
This object is achieved in accordance with the invention in that the circuit arrangement is designed for the conversion of n different levels on the output of the preceding circuit wherein n is larger than or equal 3, there being provided n-1 emitter-coupled transistor pairs, the base of one transistor of each pair being coupled to the output of the preceding circuit, the collector-emitter paths of these transistors being connected in series, the emitter of one transistor pair which is not connected to a collector being connected to the current source, the collector electrode of the other transistor of the transistor pairs being connected to a current mirror, the base electrodes thereof being connected to a reference voltage, the reference voltages on the base electrodes being staggered so that the transistor pair which is connected to the current source receives the lowest voltage (relative to the supply voltage terminal whereto the current source is connected), the transistor pair which is connected thereto receiving the lowest voltage but one, etc.
The current supplied by the current-source flows into one of the current mirrors independence of the settings of the switch-transistor pairs and the same current flows out of said current mirror into one of the inputs of the I.sup.2 L-circuits. So an additional current source is not necessary.